Our Yield Learning & Reclamation solution increases your yields by reclaiming devices
wrongly labeled “bad” in real time and off line, and also creates an ongoing baseline
for yield learning and device models. It includes a comprehensive set of health
monitors across test floors to compare test sites, test cells, products and probe
cards to avoid subtle but significant yield losses. In addition, our patented technology
for selecting reference dies/units allows you to perform extensive testing for additional
yield and reliability learning.
With up to 5% increased yields and with yield learning for rapid feedback to the
initial fab and design stages, you can realize significant improvements in your
yield management by using our solution to adapt … evolve … win.
For more information about this solution
OptimalTest’s implementation of “intelligent” adaptive testing through the use of
reference dies/units gives you enormous flexibility and control, so you can perform
extensive testing while achieving reduced test time. Our
Yield Learning and Reclamation
solution includes a comprehensive set of health monitors across test floors, which
compare test sites, test cells, products, probe cards and load-boards, avoiding
many subtle but significant yield losses during test. It also manages golden wafers,
correlation units and tester calibrations to validate tester performance and minimize
yield hits.
Moreover, for best yields and yield learning, reference dies can be coupled with
actionable data from other fabrication steps – such as Lithography Exposures, Defects
& Particles Sampling, In-line & End-of-line E-Test, Wafer Sort, Burn-In and Final
Test – enabling yield learning across the entire IC lifecycle. To realize effective
yield learning by rapidly closing the learning loop, OptimalTest’s software – in
real time – monitors bins, soft-bins, parametric results and functional results
to maximize yields and greatly shortening the feedback time to the fab.
Because of our advanced adaptive testing, you can also add measurements for yield,
reliability or test in specific reference die locations to enhance yield learning.
OptimalTest’s analysis can determine optimal chips to data log, but data collection
must also be adaptive, automatically knowing what data to collect on which devices.
As part of our approach to maximizing yield learning, test rules are used to select
“interesting” chips that might exhibit specific fail signatures. Thus, through OptimalTest’s
yield learning solution you’ll get a comprehensive, actionable data set which will
allows your engineers – working through your existing yield systems – to pinpoint
inefficiencies.
Additional Features:
- Powered by advanced adaptive testing methodology, using
- Data Feed Forward/Data Feed Backward (DFF/DFB)
- Closed-loop yield learning for applying insights to fab and design stages
- Rich set of yield reclamation algorithms
- In real time and off line, one tester or across a fleet of testers
- Site degradation control at any level of parallelism
- Closed-loop auto-learning recoverability process
- Ability to select reference dies
- Ability to add measurements selectively without increasing test time
- Comprehensive health monitoring
- Easy integration and adaptation with existing solutions or other OptimalTest
Solutions
Additional Benefits:
- Up to 5% higher yields through Yield reclamation.
- Faster decision making
- Ability to quickly correct fab Fab misprocesses
- Preservation of test time reduction
- Greater efficiency
- Yield learning across the entire IC lifecycle